The invention relates to a semiconductor device with a programmable element comprising a doped semiconductor region and a conductor region which are separated from one another by at least a portion of an insulating layer, the conductor region comprising a material which is suitable for forming a rectifying junction with the material of the semiconductor region, the programmable element being provided with a contact region which adjoins the semiconductor region and which has a comparatively low electrical resistivity compared therewith.
The invention in particular relates to a semiconductor device in which such a programmable element forms part of an electrically programmable memory cell which is arranged in a matrix of a number of similar memory cells.
Such a semiconductor device is known from U.S. Pat. No. 4,881,114, where the programmable element is used in a programmable memory cell. The known programmable element comprises a semiconductor region in the form of a boron-doped p-type surface zone which is situated in an n-type substrate of monocrystalline silicon. The conductor region of the known element is formed by a portion of a comparatively heavily n-type doped polycrystalline silicon layer which is separated from the p-type surface zone by a triple insulating layer of silicon oxide, silicon nitride and silicon oxide in that order.
The element can be programmed in that a voltage difference is applied between the semiconductor region and the conductor region to such a value that the insulating layer breaks down at least locally. Where the insulating layer shows breakdown, the p-type silicon of the semiconductor region and the n-type silicon of the conductor region come into mutual contact, thus forming a rectifying pn junction. In this state, the element has a comparatively low resistance at least in the forward direction of the pn junction, in contrast to the unprogrammed state in which the element is non-conducting.
For the purpose of electrically connecting the semiconductor region, the programmable element is provided with a contact region which has a substantially lower electrical resistance than the semiconductor region itself. The contact region in the known device comprises a surface zone which is comparatively heavily p.sup.+ -type doped and which adjoins the semiconductor region.
The contact region does provide a comparatively good conductive connection to the memory element, but it requires additional surface area in the known device, which is to the detriment of the packing density and renders the known memory cell in particular less suitable for large-scale integration.